1. Field of the Invention
The present invention relates to a method for driving an image display apparatus for forming an image on a plane.
2. Description of the Related Art
In an image display apparatus of a fixed pixel structure, there are cases where the uniformity of luminance is degraded by variation in luminous efficiency of each pixel or the like. In order to cope with this problem, for example, as disclosed in Japanese Patent Application Laid-Open (JP-A) No. 8-234690 and JP-A No. 9-251276, a technology for improving the uniformity of luminance by correcting the amount of drive for each pixel has been known.
FIG. 1 shows a configuration of a conventional image display apparatus. A reference numeral 1 denotes a display panel using a surface conduction electron-emitting device. Scanning wiring Dx1 to Dxm in the direction of row and modulation wiring Dy1 to Dyn in the direction of column are arranged in a matrix and electron-emitting devices (not shown) are arranged at respective points of intersection, so that the display panel 1 is provided with the electron-emitting devices arranged in a matrix with m rows and n columns.
When current is passed through this device, electrons are emitted and the device has a non-linear characteristic as shown in FIG. 2. For example, when a voltage of 16 V is applied to the device, electrons are emitted, but when a voltage of 8 V is applied, electrons are hardly emitted. Further, the emitted electrons are accelerated by acceleration means (not shown) and collide with a phosphor surface (not shown) to emit light. That is, the device emits light when it has a voltage of 16 V applied thereto but does not emit light even when it has a voltage of 8 V, one-half the voltage, applied thereto. Hence, passive matrix drive shown in FIG. 3 can be performed.
A reference numeral 2 in FIG. 1 denotes a scanning driving unit. The scanning driving unit 2 is constructed of a selector switch 22, a selection potential generating unit 23, and a non-selection potential generating unit 24.
A reference numeral 3 denotes a modulation driving unit. The modulation driving unit 3 is further constructed of a shift register 31, a latch 32, a pulse width modulating circuit 33, and a driving amplifier 34.
A reference numeral 4 denotes a synchronization separating unit and a reference numeral 5 denotes an AD converter. The synchronization separating unit 4 and the AD converter 5 are provided if necessary. A reference numeral 6 denotes a control circuit for generating a drive control signal. A reference numeral 7 denotes an image processing unit for converting resolution. A reference numeral 8 denotes a multiplier for correcting display data by correction data. A reference numeral 11 denotes a correction memory for storing the correction data.
A reference symbol S1 denotes an analog image signal input to an apparatus. A reference symbol S2 denotes a synchronous signal separated from the analog image signal S1. A reference symbol S3 denotes is a digital image signal obtained by sampling the analog image signal S1 by the AD converter 5. A reference symbol S4 denotes a display signal obtained by subjecting the digital image signal to image processing. A reference symbol S5 is a conversion timing signal supplied to the AD converter 5. A reference symbol S6 denotes an image processing control signal for controlling the action of the image processing unit 7. A reference symbol S7 denotes an image clock signal for controlling the action of the shift register 31. A reference symbol S8 denotes a modulation control signal for controlling the action of the modulation driving unit 3. A reference symbol S9 denotes a PWM clock that becomes the action reference of a pulse width modulating circuit 33. A reference symbol S10 denotes a scanning control signal for controlling the action of the scanning driving unit 2. A reference symbol S11 denotes a corrected correction display signal. A reference symbol S13 denotes a correction memory control signal for controlling a data output timing from the correction memory 11. S15 denotes a correction signal read from the correction memory 11.
The synchronous signal S2 extracted from the analog image signal S1 input to the apparatus by the synchronization separating unit 4 is input to the control circuit 6.
The control circuit 6 generates various kinds of drive control signals S5 to S10, and S13 from the synchronous signal S2.
The AD converter 5 inputs the analog image signal S1 according to the conversion timing signal S5 and samples the analog image signal S1 and outputs the digital image signal S3.
The image processing unit 7 inputs the digital image signal S3 and performs image processing such as image adjustment and resolution conversion and outputs the display signal S4.
The correction memory 11 outputs the correction signal S15 according to the correction memory control signal S13. The multiplier 8 inputs the display signal S4 and the correction signal S15 and multiplies the display signal S4 by the correction signal S15 and outputs the correction display signal S11.
An action for the scanning driving unit 2 and the modulation driving unit 3 to drive the display panel 1 will be described. Timing at this time is shown in FIG. 4.
In the modulation driving unit 3, the correction display signal S11 is input to the shift register 31 in sequence in synchronization with the image clock signal S7 and display data is held in the latch 32 according to the LOAD signal of the modulation control signal S8. Then, a pulse signal having a length responsive to the data held in the latch 32 is generated by the pulse width modulation circuit 33 by use of the STRAT signal of the modulation control signal S8 with reference to the PWM clock S9 and has its voltage amplified to Vm by the driving amplifier 34 and drives the modulation wiring of the display panel 1.
In the correction memory 11 is stored correction data corresponding to the respective pixels of the display panel 1.
It is assumed that the display signal S4 corresponding to each device constructing each pixel of the display panel 1 is D(x, y) (where 1≦x≦n and 1≦y≦m, ditto for the following), and that the total sum of electric power applied to each light-emitting device in one frame based on the display signal S4 or the correction display signal S11 is the amount of driving V(x, y), and that the amount of light emission of each device is P(x, y), and the relative luminous efficiency of each device (Individual luminous efficiency normalized by the average of the luminous efficiencies of all devices. An average device is 1, and an inefficient device, namely, a dark device is 1 or less) is K(x, y).
Since the amount of light emission of the display device is proportional to the amount of driving applied to the display device, the following equation holds:P(x, y)∝V(x, y)  [Equation 1]
When a correction is not made, variation in the luminous efficiency of the device affects an image to be displayed and hence an image ofP(x, y)∝D(x, y)×K(x, y)  [Equation 2]
is formed on the display panel 1. This makes the image look rough and spotted.
Here, the inverse of luminous efficiency K(x, y) of each device is made a correction coefficient Q(x, y), which is stored in the correction memory 11. The correction coefficient Q(x, y) is a correction value for correcting the variation in the luminance of each device and is determined for each device. When the multiplier 8 multiplies the D(x, y) of the display signal S4 by the Q(x, y) of the correction signal S15 as a correction value and D(x, y)×Q(x, y) as a correction display signal S11 drives the display panel 1, under the influence of luminous efficiency of the device, an image ofP(x, y)∝D(x, y)×Q(x, y)×K(x, y)  [Equation 3]
is formed on the display panel 1. Since Q(x, y) is the inverse of K(x, y), the image of P(x, y)∝D(x, y), in which variation in the luminous efficiency of each device is cancelled, is formed, in other words, a uniform image can be generated.